Method to increase capacitance

Details Method to increase capacitance Method to increase capacitance

1997-09-22

1999-02-09

Chang, Joni

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438398, H01L 218242

Patent

active

058693688

ABSTRACT:
A high capacitance charge storage capacitor for a DRAM has a lower electrode in contact with one source/drain region of a transfer FET. The lower capacitor electrode includes a first layer of polysilicon deposited over part of the transfer FET and in contact with the source/drain region of the transfer FET. An oxide layer is deposited over the first polysilicon layer and then a sparse layer of hemispherical grained polysilicon is deposited on the surface of the oxide layer. The sparse layer of hemispherical grained polysilicon has grains on the order of approximately 100 nanometers across that are separated on the average by approximately 100 nanometers. The layer of oxide is etched using the sparse grains of hemispherical grained polysilicon as a mask, with the etch process stopping on the surface of the first layer of polysilicon. A second layer of polysilicon is deposited over the remaining grains of hemispherical grained polysilicon and over the column-shaped portions of the oxide layer left by the etching stop. A capacitor dielectric is formed over the second layer of polysilicon and then an upper capacitor electrode is provided.

REFERENCES:
patent: 5405799 (1995-04-01), Woo
patent: 5650351 (1997-07-01), Wu
patent: 5702968 (1997-12-01), Chen

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