Method for making asymmetrical gate oxide thickness in channel M

Details Method for making asymmetrical gate oxide thickness in channel M Method for making asymmetrical gate oxide thickness in channel M

1998-01-05

2000-10-03

Bowers, Charles

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

H01L 21336

Patent

active

061272353

ABSTRACT:
A semiconductor device has gate with a first material having a first dielectric constant adjacent the semiconductor substrate and a second material having a second dielectric constant adjacent the semiconductor substrate. A conductor, such as polysilicon, is then placed on the gate so that the first and second materials are sandwiched between the conductor and the semiconductor substrate. Since the dielectric constants of the two materials are different, the gate acts like a gate having a single dielectric with at least two thicknesses. One dielectric constant is larger than the other dielectric constant. The higher dielectric constant material is comprised of a single spacer located within the gate at the sidewall nearest the drain of the semiconductor device. A layer of silicon dioxide is positioned on the semiconductor substrate between the spacer and the other sidewall of the gate. The thickness of the spacers can be adjusted to optimize the performance of the semiconductor device.

REFERENCES:
patent: 5302845 (1994-04-01), Kumagai et al.
patent: 5841168 (1998-11-01), Gardner et al.
patent: 5952702 (1999-09-01), Gardner et al.
Stephen A. Campbell et al., "MOSFET Transistors Fabricated with High Permitivity TiO.sub.2 Dielectrics," IEEE Transactions on Electron Devices, vol. 44, No. 1, Jan. 1997.

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