Single-poly EEPROM cell structure operations and array architect

Details Single-poly EEPROM cell structure operations and array architect Single-poly EEPROM cell structure operations and array architect

1999-02-25

2000-02-15

Clark, Sheila V.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257299, 257300, 257312, H01L 29788

Patent

active

060256257

ABSTRACT:
A single-poly EEPROM cell comprising an inverter and a capacitive coupling area. The inverter is formed by: a p-well formed in a substrate; a gate structure formed atop the p-well and being formed from a thin gate oxide layer underneath a conductive layer; an n-base formed adjacent to a first edge of the gate structure and within the p-well; a p+ structure formed within the n-base; and a n+ structure adjacent a second edge of the gate structure and within the p-well. The capacitive coupling area is formed from a second p-well formed in the substrate and a floating gate, the floating gate formed from the conductive layer and capacitively coupled to the second p-well.

REFERENCES:
patent: 5828095 (1998-10-01), Merritt
patent: 5960283 (1999-09-01), Sata

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