Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-07-14
1998-07-14
Quach, T. N.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438586, 438634, 438649, 438683, H01L 21283, H01L 21336
Patent
active
057803480
ABSTRACT:
A method of making a self-aligned silicide component having parasitic spacers formed on the sides of an upper surface of the component isolating regions, the bottom sides of the spacers and the exposed sides of the gate regions, which increases a distance from a metal silicide layer at a corner of an active region neighboring the component isolating region to the source/drain junction, to prevent undesired current leakages. The formation of parasitic spacers increases a distance from the metal silicide layer lying above the gate surface to the metal silicide layer lying above the source/drain surface so that an ability to withstand electrostatic damages is enhanced.
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patent: 5661052 (1997-08-01), Inoue et al.
patent: 5698468 (1997-12-01), Kapoor
Lin Tony
Lur Water
Sun Shih-Wei
Quach T. N.
United Microelectronics Corporation
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