Method of manufacturing a BIMIS

Details Method of manufacturing a BIMIS Method of manufacturing a BIMIS

1995-11-28

1998-06-30

Niebling, John

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438482, 438584, 438564, 438680, 148DIG152, H01L 218249

Patent

active

057733406

ABSTRACT:
A method of manufacturing an improved bipolar transistor or BiCMOS having a phosphorus-doped polysilicon emitter electrode is disclosed. The method comprises forming an emitter electrode wherein a phosphorus-doped amorphous silicon film is deposited at temperature not higher than 540.degree. C. and then subjected to low temperature annealing treatment at a temperature of 600.degree. C. to 750.degree. C., under which the amorphous silicon is converted to a polysilicon and the phosphorus present in the amorphous silicon film is diffused into a base region to form an emitter region, followed by high temperature/short time annealing treatment at a temperature of 900.degree. C. to 950.degree. C. so that an activation rate of an impurity in a boron-doped polysilicon base electrode or source-drain regions of MOS.cndot.FET is improved.

REFERENCES:
IEEE, Transaction on Electron Devices, vol. ED-36, No. 7, pp. 1370-1375, Jul. 1989 by Shinsuke Konaka, et al.
IEEE, Transactions on Electron Devices, vol. ED-33, pp. 1754-1768, Nov. 1986 by Gary L. Patton, et al.

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