Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-04-22
1999-09-07
Chang, Joni
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438277, H01L 218234
Patent
active
059500891
ABSTRACT:
A semiconductor read-only memory (ROM) device having a silicon-on-insulator (SOI) structure and a method for fabricating the same are provided. The SOI structure permits isolation of the source/drain regions from the underlying substrate, thereby preventing leakage current therebetween. The ROM device of the present invention is smaller than conventional ROM devices, and thus provides increased integration without generating leakage paths due to misalignment of the contact windows used to form metal interconnects. The ROM device includes a plurality of parallel gate regions and a grid-like polysilicon conductive layer. The grid-like structure includes a plurality of substantially parallel source/drain regions on both sides of the gate regions, and a plurality of substantially parallel channel regions crossing the source/drain regions and the gate regions at right angles. Select locations of the channel regions are impurity-doped, causing the associated memory cells to be set to a permanently-OFF state. Whereas, the undoped channel regions are associated with memory cells to be set to a permanently-ON state.
REFERENCES:
patent: 5264386 (1993-11-01), Yang
patent: 5736444 (1998-04-01), Kauffman et al.
patent: 5807778 (1998-09-01), Lee
Chang Joni
United Microelectronics Corp.
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