Semiconductor processing methods of forming complementary metal

Details Semiconductor processing methods of forming complementary metal Semiconductor processing methods of forming complementary metal

1997-06-09

1999-09-07

Trinh, Michael

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438228, 438450, 438451, 438527, H01L 218238

Patent

active

059500794

ABSTRACT:
A semiconductor processing method of forming complementary metal oxide semiconductor memory circuitry includes, a) defining a memory array area and a peripheral area on a bulk semiconductor substrate, the peripheral area including a p-well area for formation of NMOS peripheral circuitry, the peripheral area including a first n-well area and a second n-well area for formation of respective PMOS peripheral circuitry, the first and second n-well areas being separate from one another and having respective peripheries; b) providing a patterned masking layer over the substrate relative to the peripheral first and second n-wells, the masking layer including a first masking block overlying the first n-well and a second masking block overlying the second n-well, the first masking block masking a lateral edge of the first n-well periphery; and c) with the first and second masking blocks in place, providing a buried n-type electron collector layer by ion implanting into the bulk substrate; the resultant n-type electron collector layer implant extending to the second n-well periphery to be in electrical connection therewith; the resultant n-type electron collector layer implant being spaced from the first n-well periphery for preventing electrical connection with the first n-well. Memory devices and other circuitry are also disclosed.

REFERENCES:
patent: 4697332 (1987-10-01), Joy et al.
patent: 5296409 (1994-03-01), Merrill et al.
patent: 5310691 (1994-05-01), Suda
patent: 5324982 (1994-06-01), Nakazato et al.
patent: 5356821 (1994-10-01), Naruse et al.
patent: 5498554 (1996-03-01), Mei
patent: 5501993 (1996-03-01), Borland
patent: 5525532 (1996-06-01), Kim
patent: 5543647 (1996-08-01), Kobayashi et al.
patent: 5654577 (1997-08-01), Nakamura et al.

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