Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent
1988-11-29
1990-02-27
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
36523006, G11C 700
Patent
active
049051954
ABSTRACT:
An electrically programmable read only memory is equipped with latch circuits for sequentially introducing series signals which are fed through external terminals. The converter includes sequentially operated switch elements and latch circuits in order to convert the series signals into parallel signals. The thus converted parallel signals are written simultaneously in a memory array via address decoder operated selection switch elements. According to this method, the writing operations into the memory array can be conducted at a high speed even when one writing operation is relatively long as a result of this parallel signal action.
REFERENCES:
patent: 4130900 (1978-12-01), Watanabe
patent: 4691298 (1987-09-01), Fukuda et al.
patent: 4788665 (1988-11-01), Fukuda et al.
Fukuda Minoru
Kihara Toshimasa
Sugiura June
Takahashi Hideaki
Tsuchiya Fumio
Hitachi , Ltd.
Popek Joseph A.
LandOfFree
Semiconductor memory does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor memory, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-178829