Method for manufacturing MOS device

Details Method for manufacturing MOS device Method for manufacturing MOS device

1998-11-16

2000-11-28

Bowers, Charles

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438303, 438306, H01L 21336

Patent

active

061534838

ABSTRACT:
A method for manufacturing MOS device that utilizes a special shape spacer as a mask in an ion implantation operation to form a graded source/drain region. The special shaped spacer has a thin wall section on the far side away from the gate so that as ions are implanted into the substrate to form a source/drain region, dopants are implanted to various depths. The graded doping profile in the source/drain region not only reduces the severity of short channel effects, but also forms a base for forming an integral junction over the source/drain region in subsequent self-aligned silicide process.

REFERENCES:
patent: 6004851 (1999-12-01), Peng

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