Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1993-09-03

1995-05-09

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Precharge

365149, G11C 700

Patent

active

054146615

ABSTRACT:
A semiconductor memory device is disclosed. The semiconductor memory device includes: memory cells for storing data; bit-line pairs connected to the memory cells; a bit-line precharge signal generating circuit for generating bit-line precharge signals in order to precharge the bit-line pairs to a prescribed potential; switching-element pairs for electrically connecting the bit-line pairs to data-line pairs; and column decoders each applying a column select signal to the corresponding switching-element pair in accordance with column addresses to be input. In the semiconductor memory device, a condition of V.sub.P .ltoreq.V.sub.A .ltoreq.V.sub.p +V.sub.T is substantially satisfied, where V.sub.P represents the prescribed potential to which the bit-line pairs are precharged in accordance with the bit-line precharge signals generated by the bit-line precharge signal generating circuit, V.sub.T represents a threshold voltage of each of the switching-element pairs, and V.sub.A represents a potential of the column select signal in an active state.

REFERENCES:
Okamura, J., et al., "Decoded-source sense amplifier for high-density DRAMs" IEEE Cat. No. 89 TH 0262-6, JSAP CAT. No. AP891216, 1989 Symposium on VLSI Circuits Digest of Technical Papers, (1989) pp. 103-104.

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