Method of fabricating contact holes in high density integrated c

Details Method of fabricating contact holes in high density integrated c Method of fabricating contact holes in high density integrated c

1997-04-11

1999-11-30

Kunemund, Robert

Semiconductor device manufacturing: process

Chemical etching

Combined with coating step

438701, 438706, 438713, 438721, H01L 2100, H01L 2170

Patent

active

059942282

ABSTRACT:
A method for fabricating contact holes in high density integrated circuits and the resulting structure are disclosed. It is shown that by judiciously integrating the process of forming shallow tapered holes with self-alignment techniques, self-aligned holes can be fabricated with reduced number of masking process steps. This is accomplished by first forming shallow tapered holes to a certain depth over certain regions in a substrate by means of isotropic etching and then extending them by anisotropic etching to full depth corresponding to the regions they are allowed to contact. The net result is a whole set of holes which are self-aligned and which are formed by means of a single photoresist mask.

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Wolf, "Silicon Processing for the VLSI Era-vol. 2" Lattice Press Sunset Beach, CA, 1990, p. 539.
Wolf, "Silicon Processing for the VLSI Era-vol. 3" Lattice Press, Sunset Beach, CA, 1995, p. 398.

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