Method of manufacturing a vertical semiconductor device

Details Method of manufacturing a vertical semiconductor device Method of manufacturing a vertical semiconductor device

1997-10-31

1999-11-30

Everhart, Caridad

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438656, 438665, 438928, H01L 21461

Patent

active

059941871

ABSTRACT:
A semiconductor device including an N-type semiconductor substrate which includes arsenic as an impurity, a first electrode formed on a main surface of the N-type semiconductor substrate, a ground surface formed on another surface of the N-type semiconductor substrate, a second electrode formed on the ground surface and ohmically-contacted with the N-type semiconductor substrate, a semiconductor element formed in the N-type semiconductor substrate and flowing current between the first electrode and the second electrode during ON-state thereof. The device has a reduced ON-resistance thereof.

REFERENCES:
patent: 4853345 (1989-08-01), Himelick
patent: 4859629 (1989-08-01), Reardon et al.
patent: 4879250 (1989-11-01), Chan
patent: 4927784 (1990-05-01), Kazior et al.
patent: 4931412 (1990-06-01), Fischer et al.
patent: 4985740 (1991-01-01), Shenai et al.
patent: 5241862 (1993-09-01), Okabe et al.
patent: 5338961 (1994-08-01), Lidow et al.
K. Shenai et al. "Characteristics of As-Deposited and Sintered . . ."; 1988 Materials Research Society, pp. 219-225, 1988.
K. Shenai et al. "Blanket LPCVD Tungsten Silicide Technology . . ."; IEEE Electron Device Letters. vol. 10 No. 6 Jun. 1989, pp. 270-273.
K. Shenai et al. "High-performance Verticle-Power DMOSFET . . ."; IEEE Electron Device Letters. vol. 10 No. 4 Apr. 1989, pp. 153-155.
K. Shenai. "Selectivity Silicided Vertical Power . . ."; J. Vac. Sci. Technol. B6(6), Nov./Dec. 1988, pp. 1740-1745.
H.R. Chang et al. "Self-Aligned UMOSFET's with . . ."; IEEE Transactions on Electron Devices vol. ED-34 No. 11 Nov./1987; pp. 2329-2334.
K. Shenai et al. "Selectively Silicided Vertical Power . . ."; Electronics Letters, Jun. 1989 vol. 25 No. 12, pp. 784-785.
Krishna Shenai, "A50-v07-m.OMEGA..cm.sup.2 Vertical-Power DMOSFET", IEEE Elect. Device Letter, vol. No. 10, No. 3,/1989.
Krishnam Shenai, "Optimally Scaled Low-Voltage Vertical Power MOSFET's for High-Frequency Power Conversion", IEEE Trans. of Elect. Device vol. 37 No. 4, Apr. 1990.
C.Y. Ting et al, "The Use of Titanum-based Contact Barrier Layers in Silicon Technology", Thin Solid Films, 96(1982) 327-345 Electronics and Optics.
Semiconductor Devices-Physics and Technology, Jan. 1985 S.M. Sze p. 307.
Alvin B. Phillips, "Transistor Engineering and Introduction to Integrated Semiconductor Circuits", p. 76.
S. Ogawa et al. HRTEM and Nano-Scale Micro Analysis of the Titanum/Silicon Interfacial Reaction Correlated with Electrical Properties, Extended Abstract of.

Affiliated with

Also associated with

Rating

Method of manufacturing a vertical semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of manufacturing a vertical semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of manufacturing a vertical semiconductor device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1671283