Method of forming MOS transistors having gate insulators of diff

Details Method of forming MOS transistors having gate insulators of diff Method of forming MOS transistors having gate insulators of diff

1995-08-01

1998-09-22

Trinh, Michael

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438270, 438275, 438589, H01L 218238

Patent

active

058113363

ABSTRACT:
The semiconductor device includes (A) a first MOS transistor including (a) a main surface at a part of which recesses are formed, an inner surface of the recesses defining a crystal plane being able to be thermally oxidized at higher speed than the main surface, and (b) an insulator formed on the inner surface of the recesses, the inner surface of the recesses working as a channel region and the insulator working as a gate insulator in the first MOS transistor, and (B) a second MOS transistor in which the main surface works as a channel region and an insulator formed on the main surface works as a gate insulator, the gate insulator of the first MOS transistor having a greater thickness than that of the gate insulator of the second MOS transistor. Thus, above the thinner gate insulator is formed the second MOS transistor, while above the thicker gate insulator is formed the first MOS transistor having a higher breakdown voltage than that of the second MOS transistor. Thus, the number of steps for forming insulators having different thicknesses can be reduced relative to prior methods. In addition, a resist layer is not directly deposited on a gate insulator unlike prior methods, a gate insulator is not contaminated with impurities.

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Wolf et al, "Silicon Processing for the VLSI Era", vol. 1, 1986, pp. 211-217.

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