Semiconductor memory device provided with sense amplifier capabl

Static information storage and retrieval – Read/write circuit – Differential sensing

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Details

365203, 365205, 327 51, 327 55, G11C 700

Patent

active

056967276

ABSTRACT:
A semiconductor memory device includes a memory cell, a word line, a bit line pair having a first bit line and a second bit line complementary to the first bit line, a p type well, first and second source lines, a source line precharge circuit for precharging the first and second source lines, a sense amplifier connected between the first and second bit lines, driven by the first and second source lines and including first and second n channel MOS transistors formed in the p type well and third and fourth p channel MOS transistors, a first sense amplifier enable transistor connected between a power supply potential node and the first source line, a second sense amplifier enable transistor connected between a ground potential node and the second source line, and a switching circuit connected between the first source line and the p type well, and turning on in response to a control signal when the sense amplifier is active.

REFERENCES:
patent: 4893277 (1990-01-01), Kajigaya et al.
patent: 5138578 (1992-08-01), Fujii
patent: 5337271 (1994-08-01), Kawahara et al.
patent: 5412605 (1995-05-01), Ooishi

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