Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1998-11-03
2000-05-02
Whitehead, Jr., Carl
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438618, 438625, 438279, H01L 2170
Patent
active
060572256
ABSTRACT:
A semiconductor integrated circuit having a plurality of fundamental cells respectively composed of a pair of p-channel field effect transistors and a pair of n-channel field effect transistors is disclosed. Elements of each fundamental cell are connected by lines, the fundamental cells are connected by lines, and a circuit is formed. The p-channel field effect transistors are formed in symmetry to each other, the n-channel field effect transistors are formed in symmetry to each other, one p-channel field effect transistor and one n-channel field effect transistor are formed in symmetry to each other, and the other p-channel field effect transistor and the other n-channel field effect transistor are formed in symmetry to each other. Also, a gate of each field effect transistor is formed in an H shape, and a line pitch between lines of a second layer is shorter than an arranging interval (or bulk pitch) between contact portions respectively connecting a line of a first layer and an element of the fundamental cell.
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patent: 5091762 (1992-02-01), Watanabe
patent: 5185283 (1993-02-01), Fukui et al.
patent: 5217915 (1993-06-01), Hashimoto et al.
patent: 5631478 (1997-05-01), Okumura
Fujitsu Limited
Guerrero Maria
Jr. Carl Whitehead
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