Method of manufacturing a semiconductor memory device

Details Method of manufacturing a semiconductor memory device Method of manufacturing a semiconductor memory device

1997-10-31

1999-09-14

Nguyen, Tuan H.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438397, H01L 218242

Patent

active

059536098

ABSTRACT:
A storage node electrode is connected to a contact plug via an upper node contact hole. A lower cell plate electrode composed of an N type silicon film and an N type silicon film spacer is covered by the storage node electrode via a titanium oxide film as a lower capacitive insulating film and an upper cell plate electrode composed of an N type silicon film connected to the lower cell plate electrode covers the storage node electrode via a titanium oxide film as an upper capacitive insulating film. Thus, in a DRAM having a stacked and COB type memory, a surface ratio of the storage node electrode, contributing to a capacitor, is increased.

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