Method of manufacturing semiconductor memory device

Details Method of manufacturing semiconductor memory device Method of manufacturing semiconductor memory device

1997-11-10

1999-01-12

Chang, Joni Y.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438398, H01L 218242

Patent

active

058588370

ABSTRACT:
A method of manufacturing a semiconductor memory device, comprising the steps of: forming a gate electrode with an insulating spacer, forming a first silicon oxide film by high-temperature chemical vapor deposition (CVD), forming n-type source/drain regions, forming a first insulating interlayer and forming a bit line; forming a second silicon oxide film by low-temperature CVD, forming a BPSG film, and annealing the second silicon oxide film and the BPSG film by first annealing to form a second insulating interlayer constituted by the stacked films; forming a third silicon oxide film by low-temperature CVD, and annealing the third silicon oxide film by second annealing; forming a node contact hole through the annealed third silicon oxide film, the second insulating interlayer, the first insulating interlayer, and the first silicon oxide film; forming an amorphous silicon film doped n-type at the time of the film formation, patterning the amorphous silicon film to form an amorphous silicon film pattern, and removing a native oxide film on a surface of the amorphous silicon film pattern using dilute hydrofluoric acid; and converting the amorphous silicon film pattern into an n-type hemispherical grained (HSG) polysilicon film pattern by third annealing to form a storage node electrode, forming a capacitive dielectric film, and forming a cell plate electrode.

REFERENCES:
patent: 5447878 (1995-09-01), Park et al.
patent: 5554557 (1996-09-01), Koh
patent: 5792689 (1998-08-01), Yang et al.

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