Method of manufacturing complementary metallic-oxide-semiconduct

Details Method of manufacturing complementary metallic-oxide-semiconduct Method of manufacturing complementary metallic-oxide-semiconduct

1998-06-09

2000-07-04

Tsai, Jey

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438231, 438305, H01L 218238

Patent

active

060837837

ABSTRACT:
A method of manufacturing a complementary metal-oxide-semiconductor that utilizes a slight change in the patterned photoresist layer for forming the lightly doped drain structure of an NMOS and the halo implantation region during CMOS fabrication. By forming a photoresist layer that exposes the p-well region where a well pickup structure is to be formed, the distance between the photoresist layer and the gate is increased, thereby eliminating the restrictions imposed upon the tilt angle in a halo implantation. Later, the lightly doped n-type impurities in the well pickup region can be compensated for by the p-type impurity implantation when the PMOS source/drain regions are formed. Hence, the lightly doped n-type well pickup region can be reverted to a p-type impurity doped region.

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