Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-07-07
2000-01-11
Chaudhari, Chandra
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438224, 438232, H01L 218238
Patent
active
06013545&
ABSTRACT:
A method of manufacturing a high-voltage metal-oxide-semiconductor device that uses trenches instead of a field oxide layer as an isolating structure, and employs a vertical layout rather than a horizontal layout so that more area is available for forming devices and drift region is lengthened as well. Therefore, this invention is capable of fabricating a CMOS transistor even at the sub-micron level, and hence is able to increase the level of circuit integration for a given a wafer. Furthermore, localized atomic oxygen implant and epitaxial growth techniques are used in this invention. Consequently, an etching stop layer can be precisely established in the silicon substrate within an active area. Due to the presence of an oxide layer underneath the epitaxial layer, the oxide layer can serve as an etching stop layer when the active area of a silicon substrate is patterned. Moreover, when the dopants in the lightly doped regions are driven into the substrate by heating, some of the dopants in the doped region can be driven into the region underneath the MOS channel as well. Other regions are blocked by the oxide layer, thereby ensuring purity of ions outside the lightly doped region. Hence, the operating current of the device can be increased.
REFERENCES:
patent: 4729964 (1988-03-01), Natsuaki et al.
patent: 5798552 (1998-08-01), Alavi et al.
patent: 5937287 (1999-08-01), Gonzalez
Chaudhari Chandra
United Microelectronics Corp.
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