Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1996-09-03
1998-06-02
Trinh, Michael
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438305, 438307, H01L 21336
Patent
active
057598975
ABSTRACT:
An asymmetrical IGFET including a lightly and heavily doped drain regions and an ultra-heavily doped source region is disclosed. Preferably, the lightly doped drain region and ultra-heavily doped source region provide channel junctions. A method of making the IGFET includes providing a semiconductor substrate, forming a gate with first and second opposing sidewalls over the substrate, applying a first ion implantation to implant lightly doped source and drain regions into the substrate, applying a second ion implantation to convert substantially all of the lightly doped source region into a heavily doped source region without doping the lightly doped drain region, forming a drain-side spacer adjacent to the second sidewall, and applying a third ion implantation to convert the heavily doped source region into an ultra-heavily doped source region and to convert a portion of the lightly doped drain region outside the drain-side spacer into a heavily doped drain region without doping a portion of the lightly doped drain region beneath the drain-side spacer. Advantageously, the IGFET has low source-drain series resistance and reduces hot carrier effects.
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U.S. Patent Application, Serial No. 08/682,493, filed Jul. 17, 1996, entitled "Method For Fabrication Of A Non-Symmetrical Transistor", by Mark I. Gardner, Michael P. Duane and Derick J. Wristers, pending.
Dawson Robert
Gardner Mark I.
Kadosh Daniel
Advanced Micro Devices , Inc.
Sigmond David M.
Trinh Michael
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