Method of fabricating a DRAM access transistor with dual gate ox

Details Method of fabricating a DRAM access transistor with dual gate ox Method of fabricating a DRAM access transistor with dual gate ox

1995-10-25

1999-01-26

Tsai, Jey

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

148DIG116, 438981, 438287, H01L 218242

Patent

active

058638199

ABSTRACT:
The process comprises the steps of growing a first oxide layer on the upper surface of a substrate; depositing a silicon nitride layer on top of the first oxide layer; patterning the silicon nitride layer with a photoresist mask to define field oxide areas; stripping the oxide layer and regrowing a pad oxide layer on the upper surfaces of the substrate not covered by the remnants of the silicon nitride layer; removing the remnants of the silicon nitride layer; stripping the pad oxide layer and growing a sacrificial oxide layer; masking the sacrificial oxide layer with a photoresist to protect the area where the memory array will be formed; stripping the sacrificial oxide not protected by the photoresist; stripping the photoresist; and growing a gate oxide layer which is thinner than the sacrificial oxide layer. Thereafter, fabrication of the memory device may be completed using any known prior art techniques.

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patent: 4951175 (1990-08-01), Kurosawa et al.
patent: 4957878 (1990-09-01), Lowrey et al.
patent: 5023683 (1991-06-01), Yamada
patent: 5057449 (1991-10-01), Lowrey et al.
patent: 5248628 (1993-09-01), Okabe et al.

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