Semiconductor device having different impurity concentration wel

Details Semiconductor device having different impurity concentration wel Semiconductor device having different impurity concentration wel

1994-09-16

1998-03-10

Meier, Stephen

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257371, H01L 2976, H01L 2994, H01L 31062, H01L 31113

Patent

active

057264759

ABSTRACT:
A semiconductor device comprises an N-type semiconductor substrate, a first P-type well formed in the semiconductor substrate, a second P-type well formed adjacent to the first P-type well in the semiconductor substrate, the surface impurity concentration of the second P-type well being set lower than that of the first P-type well, a DRAM memory cell structure formed in the first P-type well, and an MOS transistor structure formed in the second P-type well to function in combination with the memory cell structure.

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patent: 4673962 (1987-06-01), Chaterjee et al.
patent: 5079613 (1992-01-01), Sawada et al.
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"Bipolar CMOS Merged Structure for High Speed M Bit DRAM", Kobayashi et al., IEDM 86, IEEE 1986.
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