Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Diffusing a dopant
Patent
1996-08-14
1998-03-10
Chaudhari, Chandra
Semiconductor device manufacturing: process
Introduction of conductivity modifying dopant into...
Diffusing a dopant
438164, 438551, H01L 21225
Patent
active
057260940
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
For various applications it is necessary to produce recesses with a high aspect ratio (the aspect ratio is the ratio of the recess-depth to the recess width) and diffusion regions adjacent to the recesses in substrates. The intention is to produce diffusion regions of different conductivity types.
Recesses of this type, with adjacent diffusion regions, are required, for example, in smart power technology on SOI substrates. In smart power technology, complex logic components are monolithically integrated with high-voltage power components in a substrate. Since the logic components are operated with voltage levels of the order of 5 volts, whereas voltages of up to 500 volts occur in the case of high-voltage power components, electrical isolation of the high-voltage components from the logic components is necessary.
It is known (see, for example, A. Nakagawa et al., ISPSD pp97-101, Tokyo 1990, N. Yasuhara et al., IEDM 1991, pages 141-144) to electrically insulate the high- and low-voltage components completely from each other by dielectric insulation. To this end, the components are produced in an SOI substrate. An SOI substrate comprises, on a monocrystalline silicon wafer, an insulating SiO.sub.2 layer and, on the insulating layer, a monocrystalline silicon layer which comprises the surface of the SOI substrate. The components are produced in the monocrystalline silicon layer. The insulating layer of the SOI substrate ensures vertical insulation, while the lateral insulation of the components is produced by recesses filled with insulating material. These recesses extend as far as the surface of the insulating layer. They fully surround the component to be insulated in the monocrystalline silicon layer. In order to fill the recesses, for example, the side wall is thermally oxidized and the remaining intermediate space is filled with polysilicon, etched back and subsequently surface-oxidized. The recess filling then consists of a polysilicon core which is fully enclosed by silicon oxide.
From N. Yasubara et al., IEDM 1991, pages 141-144, it is known that the switching performance of the components can be influenced by diffusion regions which are produced adjacent to an insulation recess in the monocrystalline silicon layer. This doping is carried out, for example, by diffusion out from doped glasses such as borosilicate glass or phosphorus silicate glass or by ion implantation.
Since recess depths of the order of 20 .mu.m with aspect ratios of 5 to 10 occur in smart power technology, it is difficult, when doping the side walls of the insulation recesses, to use ion implantation to produce diffusion regions with a uniform predeterminable extent.
For this reason, in order to produce diffusion regions adjacent to insulation recesses, a doped layer is applied over the entire surface before the recess is filled. Diffusion regions adjacent to the recess are produced by diffusion out from this doped layer. The surface of the substrate is in this case protected, for example, by a recess mask used during the recess etching.
In the case of recess depths and aspect ratios such as occur in smart power technology, it is not possible to structure the doped layer using the conventional photoresist technique, since illumination cannot be carried out through the photoresist at a depth of 20 .mu.m. Furthermore, further problems are caused during illumination as a result of the lack of focusing and light reflections in the resist. It is therefore not possible to produce structured diffusion regions with different conductivity type using the known technique. In order to produce circuits in which recesses with adjacent diffusion regions of different conductivity type are required, the diffusion regions of different conductivity type are produced in two steps. Firstly, those recesses in whose side walls diffusion regions of a first conductivity type are to be produced are etched. After the diffusion regions have been produced, the recesses are filled. Next, using a second recess mask, those recesses in
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Scheler Ulrich
Schwalke Udo
Sebald Michael
Chaudhari Chandra
Siemens Aktiengesellschaft
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