Method of manufacturing a shallow trench isolation structure

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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438424, 438427, 438435, H01L 21336, H01L 2176

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active

059181311

ABSTRACT:
A method of manufacturing a shallow trench isolation structure that utilizes the early formation of a strong oxide spacers so that for any subsequent pad oxide layer or sacrificial oxide layer removal using a wet etching method, the oxide layer adjacent to the substrate will not be over-etched to form recesses, thereby preventing the lowering of threshold voltage and the induction of a kink effect. The method includes the steps of forming a mask over a substrate and then patterning the mask to form a protective layer for subsequent etching operation. An oxide space is farmed on the sidewalls of the mask over the surface of the substrate. Subsequently, a trench is formed in the substrate along the side edges of the oxide spacers. A liner oxide box is formed on the sidewall of the trend and the liner oxide layer does not fill the trench. This is followed by filling the trench with a second oxide layer. After planarizing the upper surface with a chemical-mechanical polishing action, the mask is removed.

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patent: 5371036 (1994-12-01), Lur et al.
patent: 5696021 (1997-12-01), Chan et al.
patent: 5731221 (1998-03-01), Kwon
patent: 5753561 (1998-05-01), Lee et al.

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