Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-09-11
1999-04-06
Booth, Richard A.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438307, 438525, 438585, H01L 21336
Patent
active
058917837
ABSTRACT:
A method of reducing the fringe capacitance between a gate and a substrate in a semiconductor device. A silicon nitride is formed over a substrate with a buffer oxide layer thereon and patterned to form an opening. The buffer oxide layer within the opening is removed and another oxide layer is formed at the same place as a gate oxide layer. A poly-gate is formed at the opening with a wider width than the opening. Thus, a part of the poly-gate at both ends covers a part of the silicon nitride layer. The silicon nitride layer is then removed and leaves the poly-gate as a T-shape with two ends suspended over the substrate. With a large angle, a light dopant is implanted into the substrate under the suspended part of the poly-gate to form a lightly doped region. With another smaller angle, a heavy dopant is implanted into the substrate beside the poly-gate. Therefore, a source/drain is formed. A undoped silicate glass layer and a borophosphosilicate layer are formed in sequence, and an air gap is formed between the suspended part of the poly-gate and the substrate.
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Chou Jih-Wen
Lin Chih-Hung
Booth Richard A.
United Semiconductor Corp.
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