Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-08-13
1999-11-16
Fourson, George
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438200, 438305, 438306, 438307, 438233, 438583, 257356, H01L 218234
Patent
active
059857226
ABSTRACT:
There is provided a semiconductor device including a transistor, said transistor having (a) a semiconductor substrate, (b) source and drain regions formed in the semiconductor substrate, (c) a gate electrode formed on the semiconductor substrate between the source and drain regions, (d) a silicide layer formed partially on one of the source and drain regions, and (e) an electrode terminal making contact with the silicide layer. The silicide layer extends so that it covers at least an area through which the electrode terminal makes contact with the drain region. In the above mentioned semiconductor device, since the silicide layer is formed only in the vicinity of an area through which the electrode terminal makes contact with the silicide layer, it is possible to construct an output transistor in LDD structure. Thus, there can be obtained an output transistor having higher ESD immunity, higher driving ability, and higher integration. In particular, comparing to a conventional output transistor having the same driving ability, but not having a silicide layer, it could be possible to reduce a device area by 10% or more, ensuring avoidance from an increase in fabrication cost caused by increased chip size.
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Fourson George
NEC Corporation
Pham Long
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