Method of forming a programmable non-volatile memory cell

Details Method of forming a programmable non-volatile memory cell Method of forming a programmable non-volatile memory cell

1997-11-24

1999-11-16

Chaudhari, Chandra

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438595, H01L 218247

Patent

active

059857196

ABSTRACT:
A method of reducing undesired electron depletion through sidewalls of a floating gate of a floating gate transistor comprising providing a non-oxide or oxynitride layer over said sidewalls. Integrated circuitry including a non-volatile field effect transistor includes, a) a floating gate transistor having a gate construction and a pair of opposing source/drain regions, the gate construction having at least one sidewall; b) a shielding layer over the gate sidewall; and c) a dielectric layer on the shielding layer, the dielectric layer being of a different material than the shielding layer. The shielding layer might be provided over an oxide layer previously provided on sidewalls of the gate construction. The shielding layer might be provided over sidewall spacers previously provided relative to sidewalls of the gate construction. Example and preferred shielding layer materials include Si.sub.3 N.sub.4, oxynitride compounds, and aluminum.

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