Method of fabricating dynamic random access memory having a stac

Details Method of fabricating dynamic random access memory having a stac Method of fabricating dynamic random access memory having a stac

1998-05-14

1999-03-09

Tsai, Jey

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438254, H01L 218242

Patent

active

058799877

ABSTRACT:
A structure of a capacitor in a DRAM includes: A dielectric layer with a contact window for later connecting use is formed on a substrate. Then, a first-conductive layer is formed over the dielectric and is coupled to either the source or the drain of a TFET through the contact window. Subsequently, a number of insulating layers and second-conductive layers are superposed alternatively together to form a stacked layer. By using the space occupied by the insulating layers, a number of third-conductive layers replacing the inner portion of the insulating layers are formed in between the second-conductive layers. After removing the insulating layers between the second-conductive layers, a structure of a horn-like in a sectional view is formed. The first-conductive layer, the second-conductive layers and the third-conductive layers are coupled together to act as a lower electrode of the capacitor. Then, a dielectric thin film is formed over the lower electrode. And then, the fourth-conductive layer is formed over the dielectric thin film to act as an upper electrode.

REFERENCES:
patent: 5217914 (1993-06-01), Matsumoto et al.
patent: 5716884 (1998-02-01), Hsue et al.

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