Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1983-07-26

1986-10-21

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365190, G11C 700

Patent

active

046189459

ABSTRACT:
A semiconductor memory device has a plurality of memory cells arranged in a two-dimensional matrix array, word lines for connecting memory cells of each row to a row decoder, and bit lines for connecting memory cells of each column to a column decoder. The word lines include first word lines each of which is connected to several memory cells in each column section of one row. The word lines also include a second word line connected to the first word lines of each row through corresponding switches. In response to a column address signal, one of the switches of each row is turned on, so that one of the first word lines is connected to the corresponding second word line.

REFERENCES:
patent: 4156940 (1979-05-01), Hollingsworth et al.
patent: 4310900 (1982-01-01), Tsujide
Minato et al., "A Hi-CMOSII 8Kx8b Static RAM," ISSCC Digest of Tech. Papers, pp. 256-257, Feb. 12, 1982.

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