Method of making spacer-type thin-film polysilicon transistor fo

Details Method of making spacer-type thin-film polysilicon transistor fo Method of making spacer-type thin-film polysilicon transistor fo

1996-05-09

1998-09-08

Chaudhari, Chandra

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

On insulating substrate or layer

438238, 438596, H01L 2184

Patent

active

058044728

ABSTRACT:
The cross-sectional area of a thin-film transistor (TFT) is decreased in order to minimize bitline to supply leakage of the TFT. This is accomplished by utilizing a spacer etch process to manufacture a TFT having a very narrow and thin channel in a controllable manner. The spacer dimensions of the TFT may be adjusted by simply modifying the thicknesses of the poly gate and the channel poly. The channel thickness is limited by the thickness of the deposited channel polysilicon which may be as thin as approximately 300 .ANG. to 500 .ANG., and the channel width of the TFT corresponds to the height of the spacer etched along the polysilicon gate of the device which may be as small as approximately 0.15 to 0.25 .mu.m.

REFERENCES:
patent: 4554572 (1985-11-01), Chatterjee
patent: 5498557 (1996-03-01), Negishi et al.
patent: 5510278 (1996-04-01), Nguyen et al.
patent: 5658807 (1997-08-01), Manning

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