Electrical computers and digital processing systems: support – Computer power control – Power conservation
Patent
1998-06-22
2000-11-21
Coleman, Eric
Electrical computers and digital processing systems: support
Computer power control
Power conservation
709400, G06F 112
Patent
active
061516813
ABSTRACT:
A power management method and system which includes providing a system having a plurality of clock operated circuits, each clock operated circuit being operable in response to the receipt of clock signals. A first subplurality of the clock operated circuits receives an uninterrupted stream of clock signals and thereby is uninterruptably operable and a second plurality of the clock operated circuits receives a normally off interruptable stream of clock signals and is normally inoperable. The system is sampled for the presence of data signals being input thereto. The clock signals are sent to the second plurality of circuits in response to the sampling the presence of data signals being input to the system to cause the second plurality of circuits to be operable. The data signals are transmitted to the second plurality of circuits after a time delay equal to or greater than the expired time from the sampling to the sending. The system can have a plurality of input/output terminals with the sampling comprising being at each of the input/output terminals. The system includes a clock for providing the clock signals and a decode logic for sampling at one of the input/output terminals and an arbiter circuit for sampling at the other input/output terminal.
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Neil Patrick C.
Rekieta David W.
Roden Philip A.
Brady III Wade James
Coleman Eric
Holmbo Dwight N.
Telecky Jr. Frederick J.
Texas Instruments Incorporated
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