Method of making a high performance transistor with elevated spa

Details Method of making a high performance transistor with elevated spa Method of making a high performance transistor with elevated spa

1999-01-07

2000-11-21

Niebling, John F.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438301, 438303, H01L 21336

Patent

active

061502227

ABSTRACT:
The present invention is directed to a transistor formed above a layer of a dielectric material and a method of making same. In one illustrative embodiment, the method comprises forming a first layer of dielectric material, forming a plurality of source/drain regions comprised of polysilicon above said first layer of dielectric material and between said source/drain regions, and forming a second layer of dielectric material above said first layer of dielectric material. The method further comprises forming a layer of polysilicon above the second layer of dielectric material, forming a gate dielectric above said layer of polysilicon, and forming a gate conductor above said gate dielectric. The transistor structure is comprised of a first layer of dielectric material, a plurality of source/drain regions positioned above the first layer of dielectric material, a second layer of dielectric material positioned above the first layer of dielectric material, and a layer of polysilicon positioned above the second layer of dielectric material and between said source/drain regions. The structure further comprises a gate dielectric positioned above the layer of polysilicon and a gate conductor positioned above the gate dielectric.

REFERENCES:
patent: 5447875 (1995-09-01), Moslehi
patent: 5792697 (1998-08-01), Wen
patent: 5950089 (1999-09-01), Wen

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