Method for fabricating a high bias device

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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438271, 438272, 438430, H01L 21336

Patent

active

061502197

ABSTRACT:
A method for fabricating a high-bias semiconductor device contains several steps. A first-type semiconductor substrate is provided. A well doped with a second-type dopant is formed. Two episodes of ion implantation are performed to form two drift regions. The lower drift region has lighter dopant density but a greater thickness than the upper drift region. An annealing process is performed on the drift regions. A first pad oxide layer is formed over the drift regions. A first silicon nitride layer is formed over the first pad oxide layer. A trench is formed in the well. The first silicon nitride layer and the first pad oxide layer are removed. A second pad oxide layer is formed over the substrate including the trench bottom surface. A second silicon nitride layer is formed over the substrate on the second pad oxide layer other than the sidewall surface of the trench. A field oxide layer is vertically formed on each sidewall of the trench. The second silicon nitride layer is removed. A gate oxide layer is formed over the substrate including the trench bottom surface but excluding the surface of the field oxide layer. A trench gate filling the trench is formed by depositing polysilicon into the trench. A source region is on one side and a drain region is on the other side.

REFERENCES:
patent: 5891770 (1999-04-01), Lee

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