Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1999-06-04
2000-08-29
Bowers, Charles
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438229, 438230, 438303, H01L 21331, H01L 218228
Patent
active
061107905
ABSTRACT:
A method for making a MOSFET in a semiconductor substrate with self aligned source and drain contacts. The method comprises forming a gate oxide layer on the substrate followed by forming a polysilicon gate on the gate oxide layer. A liner oxide layer is formed on the gate and the gate oxide layer and nitride sidewall spacers are formed on the liner oxide layer and adjacent the sidewalls of the gate. A portion of the liner oxide layer and gate oxide layer that lies between the sidewalls of the gate and the nitride sidewall spacers is removed. An oxide layer is then formed around the gate. Next, source and drain regions are formed in the substrate adjacent to the sidewalls of the gate. Finally, a source contact and a drain contact is formed in the area between the gate and the nitride sidewall spacers.
REFERENCES:
patent: 5736446 (1998-04-01), Wu
patent: 5770507 (1998-06-01), Chen et al.
patent: 5792671 (1998-08-01), Lee
patent: 5918134 (1999-06-01), Gardner et al.
patent: 6005272 (1999-12-01), Gardner et al.
Bowers Charles
Brewster William M.
Worldwide Semiconductor Manufacturing Corporation
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