Method for manufacturing DRAM capacitor

Details Method for manufacturing DRAM capacitor Method for manufacturing DRAM capacitor

1997-12-29

1999-11-23

Trinh, Michael

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438239, 438396, H01L 218242

Patent

active

059899530

ABSTRACT:
A method for forming a DRAM capacitor that utilizes silicon nitride spacers on two occasions to perform self-aligned contact window etching operations. Furthermore, on the second etching operation, one less photomask is required for the etching of the second via. In addition, a silicon nitride layer over the first polysilicon layer has a smaller thickness than the usual oxide layer in a conventional method of manufacture. Consequently, a shallower contact step height for the capacitor, which is beneficial to the production of miniaturized devices, is obtained. Finally, the tri-fork shaped capacitor structure further increases the surface area of the capacitor so that the capacitance of the DRAM capacitor is increased.

REFERENCES:
patent: 5677227 (1997-10-01), Yang et al.
patent: 5780339 (1998-07-01), Liu et al.

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