Semiconductor device with contacts formed in self-alignment

Details Semiconductor device with contacts formed in self-alignment Semiconductor device with contacts formed in self-alignment

1996-04-18

1999-11-23

Arroyo, Teresa M.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438586, 438229, 438303, H01L 218242

Patent

active

059899514

ABSTRACT:
In a method of manufacturing a semiconductor device, laminate structures with a first insulating film as a top film are formed on a semiconductor region having a first conductive type. One of the laminate structures is a gate electrode structure including a second insulating film as a gate insulating film formed on the semiconductor region, a conductive layer as a gate electrode formed on the gate insulating film, and the first insulating film formed on the gate electrode. Next, side wall insulating films are formed on side walls of the gate electrode structure and laminate structures adjacent to the gate electrode structure. Ion implantation of impurity of a second conductive type different from the first conductive type is executed using the side wall insulating films in a self-alignment manner to produce the source/drain regions for a metal-oxide-semiconductor (MOS) transistor. Contacts are formed for source/drain regions formed between the gate electrode structure and the adjacent laminate structures, using the side walls in a self-alignment manner.

REFERENCES:
patent: 3649884 (1972-03-01), Haneta
patent: 4868138 (1989-09-01), Chan et al.
patent: 5073510 (1991-12-01), Kwon et al.
patent: 5187114 (1993-02-01), Chan et al.
patent: 5296399 (1994-03-01), Park
patent: 5335196 (1994-08-01), Anzai
patent: 5429979 (1995-07-01), Lee et al.
patent: 5536674 (1996-07-01), Kosa et al.
patent: 5547885 (1996-08-01), Ogoh
patent: 5563088 (1996-10-01), Tseng
patent: 5578524 (1996-11-01), Fukase et al.
patent: 5705028 (1998-01-01), Matsumoto
patent: 5716881 (1998-02-01), Liang et al.
patent: 5792683 (1998-08-01), Hayashi et al.
S. Subbanna et al., "A Novel Borderless Contact/Inter-connect Technology Using Aluminum Oxide Etch Stop for High Performance SRAM and Logic", IEDM 93, pp. 441-444.

Affiliated with

Also associated with

Rating

Semiconductor device with contacts formed in self-alignment does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor device with contacts formed in self-alignment, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device with contacts formed in self-alignment will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1221086