Serial data transfer circuit for a semiconductor memory device

Details Serial data transfer circuit for a semiconductor memory device Serial data transfer circuit for a semiconductor memory device

Filed on

1988-12-23

Date issued

1991-02-19

Examiner

Moffitt, James W.

Patent Class

Static information storage and retrieval

SubClass

Read/write circuit

SubSubClass

Having particular data buffer or latch

Other Related Categories

365221, 377 77, G11C 700

Type

Patent

Status

active

Patent number

049950037

Description

ABSTRACT:
A data transfer circuit is connected between first and second circuits so as to control data transfers therebetween. The data transfer circuit comprises first and second latch circuits for latching data in response to first and second latch control signals, respectively, a first data transfer gate connected between the first circuit and the first latch circuit and responsive to a first gate control signal to make electrical connection or disconnection therebetween, a second transfer gate connected between the first and second data latch circuits and responsive to a second gate control signal to make electrical connection or disconnection therebetween, and a third data transfer gate connected between the second data latch circuit and the second circuit and responsive to a third gate control signal to make electrical connection or disconnection therebetween. After data is transferred from the first circuit to the first data latch circuit, the data can be transferred from the data latch circuit to the second data latch circuit even if the data in the data first circuit disappears. The third data transfer gate can be opened to transfer data from the second data latch circuit to the second circuit.

REFERENCES:
patent: 3618033 (1968-12-01), Norquist et al.
patent: 3781821 (1973-12-01), Roth
patent: 4745577 (1988-05-01), Ogawa et al.

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