Silicidation with silicon buffer layer and silicon spacers

Details Silicidation with silicon buffer layer and silicon spacers Silicidation with silicon buffer layer and silicon spacers

1998-11-05

2000-08-08

Niebling, John F.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438301, 438655, 438682, H01L 2128

Patent

active

061001457

ABSTRACT:
High integrity ultra-shallow source/drain junctions are formed employing cobalt silicide contacts. Field oxide regions, gates, spacers, and source/drain implants are initially formed. A layer of silicon is then deposited. A protective non-contuctive film is then formed and anisotropically etched to expose the silicon layer on the source/drain regions and the top surfaces of the gates, and to form protective spacers on the edges of the field oxide regions and on the side surfaces of the gates. A layer of cobalt is thereafter deposited and silicidation is performed, as by rapid thermal annealing, to form a low-resistance cobalt silicide while consuming the silicon film. The consumption of the silicon film during silicidation results in less consumption of substrate silicon, thereby enabling the formation of ultra-shallow source/drain junctions without junction leakage, allowing the formation of cobalt silicide contacts at optimum thickness and facilitating reliable device scaling.

REFERENCES:
patent: 5824586 (1998-10-01), Wollensen et al.
patent: 5970352 (1999-10-01), Shiozawa et al.
patent: 5998849 (1999-12-01), Ishimura et al.
patent: 6015753 (1998-06-01), Lin et al.
Xin-Ping Qu et al "The effect of amorphous Si on the epitaxial growth of CoSi2 by Co/Si/Ti/Si silid state epitaxy," IEEE, pp. 264-267, Sep. 1998.
Materials and Bulk Processes, "Doping Technologies," The National Technology Roadmap for Semiconductors (1994), pp. 118-121.
H. Jiang, et al., "Ultra Shallow Junction Formation Using Diffusion form Silicides," J. Electrochem. Soc., vol. 139, No. 1, Jan. 1992, pp. 196-218.

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