Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-11-04
2000-08-08
Bowers, Charles
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438279, 438286, 438981, H01L 21336
Patent
active
061001414
ABSTRACT:
A method for forming a dual-thickness gate oxide layer starts with forming and patterning a pad oxide layer and a silicon nitride layer on a substrate. The substrate contains pre-determined regions for accommodating the internal circuit and the ESD protection circuit respectively. A field oxide layer for separating the active regions of the internal circuit and the ESD protection circuit is formed by performing an oxidation process. A thick gate oxide layer is formed on the active region of the ESD protection circuit by oxidation after the pad oxide and the silicon nitride thereover are removed. Similarly, a thin gate oxide layer is formed on the active region of the internal circuit by oxidation after the pad oxide and the silicon nitride thereover are removed. A patterned conducting layer is then formed on the substrate as gates. An implantation process is performed to form the source/drain regions within the region of the internal circuit. Next, spacers that surround the gates are formed on the substrate. And then, another implantation process is performed to form source/drain regions on the substrate within the region of the ESD protection circuit after the thick gate oxide layer is patterned to expose the substrate underneath.
REFERENCES:
patent: 5705841 (1998-01-01), Yu
patent: 5872378 (1999-02-01), Rose et al.
patent: 5910673 (1999-06-01), Hsu et al.
patent: 5939753 (1999-08-01), Ma et al.
Bowers Charles
Chen Jack
United Microelectronics Corp.
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