Method of manufacturing a polysilicon gate having a dimension be

Details Method of manufacturing a polysilicon gate having a dimension be Method of manufacturing a polysilicon gate having a dimension be

1997-10-31

1999-02-02

Booth, Richard A.

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

438595, H01L 213205, H01L 214763

Patent

active

058664734

ABSTRACT:
A method of manufacturing an MOS transistor having a gate length dimension less than the dimension available by methods available with conventional manufacturing methods that are limited by optical diffraction in photolithography. The method includes forming a polysilicon gate structure on a gate oxide layer, forming a nitrogen-doped layer on the polysilicon gate structure, forming selected depth oxide sidewalls on the polysilicon gate structure and etching the nitrogen-doped layer and the oxide sidewalls.

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