Method for forming a dram cell with a multiple pillar-shaped cap

Details Method for forming a dram cell with a multiple pillar-shaped cap Method for forming a dram cell with a multiple pillar-shaped cap

1997-10-20

1999-02-02

Chang, Joni

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438398, H01L 218242

Patent

active

058664556

ABSTRACT:
A method for forming a multiple pillar-shaped capacitor of a dynamic random access memory cell is disclosed. The method includes patterning to form a doped polysilicon layer (118) over a semiconductor substrate (110), wherein at least a portion of the doped polysilicon layer communicates to the substrate. Next, a titanium nitride layer (122) is conformably formed on the doped polysiliocn layer, and a hemispherical grained silicon layer (124) is then formed on the titanium nitride layer, wherein the titanium nitride layer serves as a seed layer for forming the hemispherical grained silicon layer. The present invention also includes etching the titanium nitride layer using the hemispherical grained silicon layer as a mask, and etching portions of the doped polysilicon layer using the titanium nitride layer as an etch mask. Finally, a dielectric layer (136) is formed on the doped polysilicon layer, and a conductive layer (138) is then formed on the dielectric layer.

REFERENCES:
patent: 5726085 (1998-03-01), Crenshaw et al.
patent: 5754390 (1998-05-01), Sandu et al.

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