Dram cell with three-sided-gate transfer device

Details Dram cell with three-sided-gate transfer device Dram cell with three-sided-gate transfer device

1998-07-30

2000-09-19

Hardy, David

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257288, 257300, 257618, 257623, 257906, H01L 27108

Patent

active

061216518

ABSTRACT:
A DRAM device and a process of manufacturing the device. The DRAM device includes a bit-line coupled to a signal storage node through a transfer device that is controlled by a word line. The transfer device includes a mesa structure having a first end, a second end opposite the first end, a top, a first side, and a second side opposite the first side. A bit-line diffusion region couples the first end of the mesa structure to a bit-line contact. A storage node diffusion region couples the second end of the mesa structure to the signal storage node. The word line controls a channel formed in the mesa structure through a gate which is formed upon the first side, the second side, and the top of the mesa structure. A sub-minimum width of the mesa structure allows full depletion to be easily achieved, resulting in volume inversion in the channel.

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