Memory system with a stabilized sense amplifier

Static information storage and retrieval – Read/write circuit – Precharge

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Details

307238, 307110, G11C 1140

Patent

active

042427398

ABSTRACT:
In a memory system where certain memory systems a signal detector is provided which begins to detect the voltage of a data line to which a plurality of memory cells are connected when the voltage of a latch node of the detector is shifted from a first to a second level by discharging the node through a switch in response to an input signal provided by a pulse circuit. To avoid discharging the node at an improper time, a signal transformation circuit is interposed between the pulse circuit and the switch to provide the switch with a signal to turn it on only when the level of the signal provided by the pulse circuit is high enough. In this manner, improper discharging due to shifts in the pulse circuit can be avoided.

REFERENCES:
patent: 4044341 (1977-08-01), Stewart
patent: 4060740 (1977-11-01), Nishimura

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