Static information storage and retrieval – Read/write circuit – Testing
Patent
1989-07-13
1991-09-03
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Testing
36518905, G11C 700
Patent
active
050460480
ABSTRACT:
A semiconductor integrated circuit having a test mode in addition to a normal mode, includes a mode detecting circuit for detecting a state of each mode and generating a mode signal, a prebuffer circuit for receiving the mode signal generated by the mode detecting circuit, amplifying an input signal by using an output driving capacity corresponding to the mode signal, and outputting the amplified signal, and an output buffer circuit for receiving an output from the prebuffer circuit and outputting data outside the integrated circuit.
REFERENCES:
patent: 4635234 (1987-01-01), Yamaguchi
patent: 4644265 (1987-02-01), Davidson et al.
patent: 4733168 (1988-03-01), Blackenship et al.
patent: 4752729 (1988-06-01), Jackson et al.
patent: 4899313 (1990-02-01), Kumanoya et al.
Atsumi Shigeru
Imamiya Keniti
Miyamoto Junichi
Ohtsuka Nobuaki
Tanaka Sumio
Kabushiki Kaisha Toshiba
Popek Joseph A.
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