4. Error detection/correction and fault detection/recovery
  5. Pulse or data error handling
  6. Digital logic testing

Wolfgang Spirkl

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Address generator for generating addresses for an on-chip...

Static information storage and retrieval – Addressing – Including particular address buffer or latch circuit...
Reexamination Certificate

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Apparatus and method for controlling a driver strength

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
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Asynchronous data transmission

Static information storage and retrieval – Addressing – Sync/clocking
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Clock signal synchronizing device with inherent duty-cycle...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing
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Concept for reducing crosstalk

Multiplex communications – Crosstalk suppression
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Profile ID: LFUS-PAI-P-2243232

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