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William R. Bryg

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Access hints for input/output address translation mechanisms

Patent

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Apparatus and method for a load bias--load with intent to semaph

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Apparatus and method for a virtual hashed page table

Electrical computers and digital processing systems: memory – Address formation – Hashing
Reexamination Certificate

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Apparatus and method for a virtual hashed page table

Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate

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Atomic operation control scheme

Patent

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Profile ID: LFUS-PAI-P-238027

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