4. Multiplex communications
  5. Wide area network
  6. Packet switching

Thomas A. Keaveny

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Architecture for a high-performance network/bus multiplexer inte

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
Patent

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Data structure synthesis in hardware using memory...

Data processing: structural design – modeling – simulation – and em – Emulation – Of peripheral device
Reexamination Certificate

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Dual-ported electronic random access memory that does not...

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Reexamination Certificate

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Hybrid communications link adapter incorporating input/output an

Multiplex communications – Wide area network – Packet switching
Patent

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Mechanism for maintaining revisions of objects in flash memory

Data processing: software development – installation – and managem – Software program development tool – Translation of code
Reexamination Certificate

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Profile ID: LFUS-PAI-P-129804

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