4. Semiconductor device manufacturing: process
  5. Making field effect device having pair of active regions...
  6. Having insulated gate

Tae-Soo Park

Inventor

Rate now
  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

Inventor

active

Method of forming dual damascene interconnection using low-k...

Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Method of manufacturing a metal oxide semiconductor transistor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

No associations

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Tae-Soo Park does not yet have a rating. At this time, there are no reviews or comments for this inventor.

If you have personal experience with Tae-Soo Park, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Tae-Soo Park will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-P-2826057

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.

Canada

 Charities
 Companies
 MP Candidates
 Patents
 Employee Salary Disclosure

World

 Places of the World
 Scientific Papers

United States

 Banks
 Companies
 Counties
 Patents
 Employee Salary Disclosure