Sunil Saxena

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Apparatus and method for a virtual hashed page table

Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate

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Apparatus and method for a virtual hashed page table

Electrical computers and digital processing systems: memory – Address formation – Hashing
Reexamination Certificate

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Cover instruction and asynchronous backing store switch

Electrical computers and digital processing systems: processing – Processing control – Context preserving (e.g. – context swapping – checkpointing,...
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Method and apparatus for calculating a page table index from...

Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address
Reexamination Certificate

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Profile guided TLB and cache optimization

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Profile ID: LFUS-PAI-P-393802

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