4. Error detection/correction and fault detection/recovery
  5. Pulse or data error handling
  6. Digital logic testing

Sergio Pelagalli

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Connection matrix for a microcontroller emulation chip

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent

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Memory cells matrix for a semiconductor integrated microcontroll

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or...
Patent

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System with logic gates having a progressive number of...

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output access regulation
Reexamination Certificate

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Profile ID: LFUS-PAI-P-953878

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